Pathway W1000s Excursions
- Using emacs navigation commands (including CONTROL-U), produce an ASCII art image at least forty characters wide and twenty-four characters high. Save your image to a file at the path ~/Experiences/W1004/art.txt.
- Repeat the above process adding several new images below the first to form a vertical comic strip.
- References: ASCII art (Wikipedia)
W1016 Logic Composition
Consider a 7-segment LED display, as shown. The display is capable of indicating all decimal digits, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9 and the hexadecimal digits a, b, c, d, e, and f.
- Constraining your output to a seven-segment display, draw each digit using only the segments provided.
- Consider a four-bit binary input, representing hexadecimal digits 0-f. Develop a series of logic gates which convert the four-bit input into a seven-segment output, such that the binary number on the four-digit input is correctly represented on the seven-segment display.
- Save a link to your engineering design in your journal.
W1018 SR Latch
While an SR Latch is fully capable of remembering a single bit of information, it's generally not used to build a memory cell because it lacks the ability to perform synchronously with a clock signal. In order to synchronize the data with a clock signal, rather than use a latch, we generally use a device called a "flip-flop". One of the most basic designs is called a D-type Flip Flop.
- Research a D-type Flip Flop
- Construct a D-type Flip Flop using Falstad's Editor using only AND, OR, NOT, XOR, NOR, and NAND gates.
- Export each circuit using the
File | Export As Text...option from the menu bar
- The text contains all of your work for the exercise. Select the entire text, copy it, and paste it into your journal using the correct excursion number.
- Answer the following questions:
- What additional functionality does a D-type Flip Flop provide that is unavailable in an SR Latch?
- How do the inputs to a D-type Flip Flop differ from the inputs of an SR Latch?
- How does a D-type Flip Flip protect against the forbidden state of an SR Latch?